Product Overview
RSCALC is a "resistance value calculation & analysis tool" that provides intuitive verification of point-to-point R, and calculations of current density, current value, and voltage. The results of calculations can be displayed as a color (distribution) map on IC Design Visualization tool LAVIS-plus and be checked visually.
- Quick resistance value calculation achieved by original calculation method and multi-threading.
- No need for netlist, and power/ground routing can be checked early in design phase.
Operating Environment
| OS | Version | Architecture |
|---|---|---|
| Linux | kernel 2.6.32 or later, glibc 2.12 or later RedHat Enterprise Linux 6 or later |
x86_64 (64bit) |
Main Features
Resistance calculation and displayTaking advantage of high speed drawing in LAVIS-plus, resistance hotspots are instantaneously identified in color mapping. Also, point-to-point combined resistance and least resistance path are calculated and displayed. |
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Current density and current value displayCurrent density and current values are calculated and displayed in color mapping. In addition, current sources can be placed on nets, and values at specific times, the average of multiple measurement times, and peak values can be calculated to identify high resistance spots. |
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Voltage calculation and displayVoltage values are calculated and displayed in color mapping. Moreover, by narrowing down by values at specific times, the average of multiple measurement times, and peak values, high resistance spots can be identified. |
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Wire length calculation and displayWire length from pad is calculated and displayed in color mapping where the shortest path is also displayed on demand. |
Allowable current and current density calculation and displayBy replacing wire width with allowable current value and displaying in color mapping, high resistance portions can be and identified by color-mapping wire widths. Also, color mapping differences over adjacent figures provides you with on-the-fly identification of idiosyncratic change of allowable current value induced by drastic wire-width changes. |
and more...
